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-- $Archive:: /VHDL/product/davincihd/davincihd.vhd                            $
-- $Revision:: 004                                                             $
-- $Date:: August 22, 2007                                                     $
-- $Author:: davyh                                                             $
--
--
-- Copyright (c) 2007, Spectrum Digital Incorporated
-- All rights reserved
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.004 - Rev C - I2C_SDA_OUT now takes the Reset_SYSTEM signal as an input in order to avoid a race condition involving powering the board and the reset signals.

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.003 - Rev C - Set PCI_FORCE_ON to be active when PCI is inserted

.003 - Rev C - Added UART2_RXD and UART2_EN

.003 - Rev C - Added IR_IN and GPIO_IR_EN

.003 - Rev C - Reg0 now looks like this:
    ------------------------------ Reg0 (0x3a) -----------------------------
    --                          [=0]                     [=1]
    -- BIT 0    ATA_RSTn        *ATA Normal              ATA Reset
    -- BIT 1    ATA_PWD         *ATA Power +5V           ATA Power OFF
    -- BIT 2    VSCALEON        *VSCALE[0:1]=HIGH        VSCALE[0:1]=GP[06:07]/VDDADJ[0:1]
    -- BIT 3    VLYNQ_RSTn      *VLYNQ Normal            VLYNQ Reset
    -- BIT 4    CIR_DEMOD       *DeModulated CIR=[GPO1]  DeModulate Disabled
    -- BIT 5    CIR_MOD         *36-KHz CIR=[UART2_RXD]  36-KHz Modulate Disabled
    -- BIT 6    I2C_INT         *I2C INT Enable          I2C INT Disable
    -- BIT 7    USB_FB          *USB Feedback Enable     USB Feedback Disable

    > CIR_DEMOD = 0 sends a demodulated CIR signal to GPO1.
    > CIR_DEMOD = 1, GPO1 = 0

    > CIR_MOD = 0, sends a 36 KHz modulated CIR signal to UART2_RXD
    > CIR_MOD = 1, UART2_RXD = High Impedence

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.002 - Rev B - Disabled internal pullups on all pins except I2C_INTn & ARM_EMU_RSTn.  This interfered with external pull downs.

.002 - Rev B - Set PCI_FORCE_ON to always be 0.  This enables U63 be always be active and thus have the switch act as a wire.

.002 - Rev B - Added CLKIN - 12 MHz clock to the synchronize the I2C SDA & I2C SCL lines

.002 - Rev B - Added Enable_EXT_EMIF signal as input to PCI_ATA_DETECTn.  This will allow access to pin GPIO13/EMA22 to DC_P3.

.002 - Rev B - Added Enable_NAND signal to prevent loss of NAND access when the ATA Power is turned off in Firmware-001.  Pin PCI_DETECTS1 now gets Enabled_NAND as an input.  Enable_NAND is set when there is no PCI and no External EMIF situtations, and cleared when either a PCI or External EMIF is encountered.

.002 - Rev B - TVP5147_I2C & TVP7002_I2C is now enabled by Reg1(4).TVP_SELECT instead of using the powerdown bits Reg1(1) & Reg1(3).  Fixes a problem where a glitch can occur on the I2C lines.  By default power on the TVP5147 & TVP7002 are now ON.  When Reg1(4).TVP_SELECT = 0 the TVP5147_I2C is enabled and when Reg1(4).TVP_SELECT = 1 the TVP7002_I2C is enabled.

.002 - Rev B - Reg1 now looks like this:
    ------------------------------- Reg1 (0x3b) -----------------------------
    --                          [=0]                     [=1]
    -- BIT 0    TVP5147_RST     *TVP5147 Normal          TVP5147 Reset
    -- BIT 1    TVP5147_PWD     *TVP5147 Normal Mode     TVP5147 Power Down
    -- BIT 2    TVP7002_RST     *TVP7002 Normal          TVP7002 Reset
    -- BIT 3    TVP7002_PWD     *TVP7002 Normal Mode     TVP7002 Power Down
    -- BIT 4    TVP_SELECT      *Select TVP5147          Select TVP7002
    -- BIT 5    VID_IN_MODE     *Standard Def In         High Def In
    --                          (CV/SV)                  (HD_Y/HD_C)
    -- BIT 6    VID_OUT_MODE    *Standard Def Out        High Def Out
    --                          (ADV_S)                  (ADV_Y/ADV_C)
    -- BIT 7    -

    > To access TVP5147 (Composite video) set Reg1(4).TVP_SELECT = 0
    > To access TVP7002 (Component video) set Reg1(4).TVP_SELECT = 1
    > OnReset the powerdowns for both TVP5147 & TVP7002 are off (i.e. both chips are being powered)

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.001 - Rev A - Initial Firmware Build